/*****************************************************************************
* xr17d352.h
*
*****************************************************************************/

#if !defined(__XR17D352_REGS_H__)
# define __XR17D352_REGS_H__

/* */
#define XR17D352_VENDOR_ID		0x13A8
#define XR17D352_DEVICE_ID		0x0352

#define XR17D352_MEMORY_SIZE		2048

/* Device configuration registers */
#define REG_XR17D352_INT0		0x80
#define BITS_XR17D352_IUART		0x00000003
#define IS_XR17D352_UART(ireg)						\
		((ireg) & BITS_XR17D352_IUART)

#define BITS_XR17D352_ITIMER		0x00000700
#define IS_XR17D352_ITIMER(ireg)					\
		(((ireg) & BITS_XR17D352_ITIMER) == BITS_XR17D352_ITIMER)
 
#define REG_XR17D352_TIMERCNTL			0x84
#define BITS_XR17D352_TCNTL_CMD_ENABLE		0x01
#define BITS_XR17D352_TCNTL_CMD_DISABLE		0x02
#define BITS_XR17D352_TCNTL_CMD_SINGLE		0x03
#define BITS_XR17D352_TCNTL_CMD_RETRIG		0x04
#define BITS_XR17D352_TCNTL_CMD_INTERNAL	0x05
#define BITS_XR17D352_TCNTL_CMD_EXTERNAL	0x06
#define BITS_XR17D352_TCNTL_CMD_START		0x09
#define BITS_XR17D352_TCNTL_CMD_STOP		0x0A
#define BITS_XR17D352_TCNTL_CMD_RESET		0x0B

#define IS_XR17D352_TIMERPENDING(cntl)		((cntl) & 0x01)

#define REG_XR17D352_TIMERLSB			0x86
#define REG_XR17D352_TIMERMSB			0x87

#define REG_XR17D352_DREV			0x8C

#define REG_XR17D352_DVID			0x8D
#define BITS_XR17D352_DVID			0x82
	
#define REG_XR17D352_MPIOLVL			0x90
#define BIT_XR17D352_MPIOLVL0			0x01
#define BIT_XR17D352_MPIOLVL1			0x02

#define REG_XR17D352_MPIO3T			0x91

#define REG_XR17D352_MPIOSEL			0x93

#endif /* __XR17D352_REGS_H__ */
